As semiconductor devices become faster and faster, silicon-on-insulator (SOI) devices are becoming more common. In such SOI devices, the signal wiring needs to increase its speed and signal quality. Printed circuit boards typically employ a strip line structure to improve the signal quality.
Typical prior art strip line structures are shown in FIGS. 1(a)-(b). Specifically, the strip line structure comprises a substrate 2, a signal wiring pattern 4, a dielectric 6 and a conductor 8 or 10. In FIG. 1(a), the signal wiring pattern 4 is formed on substrate 2, dielectric 6 is formed on substrate 2 covering the wiring pattern and an upper conductor 8, which functions as a power supply wiring layer or grounded layer, is formed above wiring pattern 4. In FIG. 1(b), signal wiring pattern 4 is formed on dielectric 6 and above substrate 2, a lower conductor 10 having the above mentioned function is formed below wiring pattern 4 and on substrate 2.
Other strip line structures besides those mentioned above are also known. Common to all prior art strip line structures is that one or more layers of conductors are located between the wiring pattern and the dielectric.
One problem with prior art strip line structures is that the signal wiring pattern is not completely surrounded by an insulator. That is, prior art strip line structures are not completely insulated from external conductors. This results in electrical signal leaks from the signal wiring pattern and crosstalk noise is generated due to the influence between adjacent wiring patterns. Also, mismatch of the characteristic impedance occurs.
One solution to this problem is mentioned in U.S. Pat. No. 5,357,138 to Kobayashi. In the Kobayashi disclosure, the coaxial wiring structure comprises a substrate; a grounded lower conductive layer formed on said substrate; a lower dielectric layer selectively formed on said lower conductive layer; a signal wiring pattern selectively formed on the lower dielectric layer; an upper dielectric layer formed of a photosensitive dielectric material on said signal wiring pattern and the lower dielectric layer so as to cover the signal wiring pattern provided on the lower dielectric layer; a grounded upper conductive layer formed on the upper dielectric layer; and grounded conductive layers extending between the upper and lower conductive layers which are disposed in spaces formed in the lower dielectric layer.
Despite the structure provided in the Kobayashi disclosure, there is a need to provide new and improved coaxial wiring structures which can be employed in high speed operations, yet exhibit a high signal quality.